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Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing

Автор: Bo0mB0om » 12 февраля 2016
Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing

Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing: From Algorithm to Architecture
Springer | Circuits & Systems | February 19, 2016 | ISBN-10: 3319240021 | 195 pages | pdf | 6.29 mb


Authors: Zhang, Chenxin, Liu, Liang, Öwall, Viktor
Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration;
Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support;
Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications


This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G.

Number of Illustrations and Tables
52 illus., 29 in colour
Topics
Circuits and Systems
Processor Architectures
Electronics and Microelectronics, Instrumentation

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