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Mentor Graphics Calibre 2015.2

Автор: voska89 » 23 сентября 2016

In advanced process technologies the handoff between integrated circuit (IC) layout and manufacturing has changed. In previous technologies, the handoff was a simple check when the design went to manufacturing. Now it is a multi-step process where the layout database is modified so the design can be manufactured. This presents a host of challenges. Issues arise concerning manufacturing process effects, photolithography, data volumes and achieving a cost-effective yield of finished chips from each wafer.

To meet these challenges with confidence, design teams turn to the integrated Calibre design-to-silicon platform from Mentor Graphics, which includes physical verification, full-chip, transistor-level parasitic extraction, design for manufacturability (DFM), mask data preparation (MDP) and resolution enhancement technologies (RET). Every facet of the design-to-silicon transition is efficiently and accurately managed by the Calibre product family. Moving to ever smaller geometries and new process materials causes a fundamental shift in the physical defect spectrum in silicon manufacturing. The Mentor Graphics TestKompress® embedded deterministic test tool helps companies efficiently screen complex devices to identify the new types of failures, while simultaneously reducing the cost of test.

Key 2015.2 Highlights

Physical Verification
- Calibre FDI/FastXOR
The FDI tools now support the mapping of colored data to and from OpenAccess which brings multi-patterning capabilities to your FDI flow.
- Calibre Pattern Matching
Increase efficiency with enhancements to parameters of the DFM Pattern Capture command and with new API commands to the Tcl-based library interface.
Circuit Verification
- Calibre PERC
Rulecheck-based multi-threaded parallel processing is now available in 2015.2 to improve performance, this is enabled by the -turbo command line option in addition to the SELECT PARALLEL keyword in the PERC LOAD statement.
- Calibre nmLVS
More control for LVS BLACK BOX, now with LVS BLACK BOX PORT DEPTH users can select which hierarchy level to recognize port polygons from.
- Calibre xACT
A new xCalibrate Stack viewer is launched in 2015.2, this is a new interactive viewer that shows a graphical representation of an MIPT technology file, displaying the vertical profile of your technology.
- Calibre Interactive
The Cadence Virtuoso Integration for Calibre Interactive now supports OASIS streamout which can be beneficial in reducing data size for large designs.
- Calibre RVE
Calibre RDB results can now be converted to error markers in Cadence Encounter which allows for debugging in the Cadence native environment.
- Calibre RealTime
Calibre RealTime now includes a standalone results viewing window similar to Calibre RVE for DRC for easier debugging.
- Calibre DESIGNrev
Exporting Extracted Nets can now be done directly from the Calibre DESIGNrev GUI without the need for a Tcl script.

About Mentor Graphics

Mentor Graphics is a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products and is the only EDA company with an embedded software solution.

Name: Mentor Graphics Calibre
Version: (AOI) 2015.2.36.27
Supported Architectures: x86-64
Website Home Page :

Interface: english
System Requirements: Linux
Supported Operating Systems: Linux SLES 11, Linux RHEL 5, Linux RHEL 6
Size: 2.1 Gb

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